Description
| Category | Details |
|---|---|
| Internal Platform | – Arm Cortex-M33, up to 96MHz – Numeric Vector Control (NvC) – Wakeup Interrupt Controller (WIC) |
| Memory | – 1MB program flash, with ECC – 128KB SRAM, with ECC and parity check |
| Wireless Sub – system | – Arm Cortex-M33 dedicated core – 8KB 256-bit SRAM, used for security-certified secure engine and IoT components – Compliant with IEEE 802.15.4-2015 standard wireless module – 10dBm 250kbps receive sensitivity – Added ACK timing support in 802.15.4e – Dual PAN support – 2.4GHz Low Power (LE) 5.0 wireless module supports up to 24 concurrent hardware connections in any master/slave combination – 106dBm 125kbps long-range receive sensitivity – 102dBm 500kbps long-range receive sensitivity – 97.5dBm 1Mbps medium-range receive sensitivity – 95dBm 2Mbps short-range receive sensitivity – Adjustable transmit output power up to +10dBm – Data rates: 125kbps, 500kbps, 1Mbps, 2Mbps – Modulation types: 2FSK, GFSK, MSK, GMSK – On-chip balun with single-ended bidirectional RF port |
| Peripherals | – Analog – 18-bit single-ended SAR analog-to-digital converter (ADC), up to 2Msps – Two analog comparators (CMP), with 12-bit digital-to-analog converter (DAC) – 1.0V-2.1V reference voltage (Vref) – Timers – Two 32-bit general-purpose timers (TM), with PWM function, support DMA – Two 20-bit general-purpose timers (GTM) with pulse-width modulator, with capture function – Four 32-bit general-purpose timers (GPT), support DMA – One 64-bit general-purpose timer – 32-bit real-time counter (RTC), with 32-bit alarm and independent power supply – Signal event trigger (SET) for measuring time periods/frequencies and triggering other devices – Communication Interfaces – Two full-function UART (UART) modules – Two SPI modules and one MIPI-I3C module – Two support system management bus (SMBus) up to version 2.0 and I2C (PD2C) modules – With CAN and CAN FD, two full-function CANs, fully compliant with CAN FD version 2.0, part B, FD support – One multi-function RIO module, supporting UART, I2C, SPI, camera, LCD RGB, PWM and other interfaces – 28-bit GPIO (48QFN) – Power Management – Support for buck and boost DC-DC converters – Multi-port DMA controller, with traffic classification (secure/non-secure) – Used for power-mode-based wakeup unit |
| Information Security | – EdgeLock secure core, internal configuration – Supports EdgeLock 2GO certificate generation and management – Full life cycle management – Symmetric cipher algorithms — AES-128/192/256 (ECB, CBC, CTR, GCM, CMAC and CCM) – Asymmetric cipher algorithms — ECC NIST P-192/224/256/384/521, Curve25519 – Key exchange algorithms — ECDH(E), SPAKE2+, JPAKE – Secure key generation, storage and management |
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